PCB
Order

Step-by-step runbook for placing the first PCB order with EI Microcircuits — 36 boards, EVT-0.1, turnkey PCBA with BGA inspection. Led by Gavin Phillips, Electrical Engineer at Ambient Intelligence.

ambientintel/ambient-device-hw
Prepare
Quote
Order
Receive
Goal
Vendor
EI Microcircuits
Turnkey PCBA supplier
Quantity
36 Boards
12 rooms × 3 zones
Stackup
8-Layer FR4
0.062″ · HASL-LF
Process
Turnkey PCBA
BGA + SMD + IPC-A-610 Cl.2
Target
EVT-0.1
Rev A pilot build
STEP 01
Prepare⏱ ~30 min
Complete

Gerber Package Export

Export all production Gerber layers, drill files, and board outline from Altium EVT-0.1.OutJob. The 8-layer ambient-device-hw stack generates 10 copper layers, 2 solder mask layers, 2 silkscreen layers, and 2 Excellon drill files.

Use the configured EVT-0.1.OutJob output job — do not manually export individual layers. The OutJob ensures consistent filenames, units, and format settings that EI Microcircuits expects.

$ run the Gerber output job
# In Altium Designer:
# 1. Open project: ambient-device-hw/hardware/schematics/altium/PROC091G2(Octavo).PcbDoc
# 2. Open Output Jobs/EVT-0.1.OutJob
# 3. Under "Fabrication Outputs" → "Gerber Files" → Run
# 4. Under "Fabrication Outputs" → "NC Drill Files" → Run
# Output folder: hardware/gerbers/EVT-0.1/
$ zip the package for EI Microcircuits
cd hardware/gerbers/EVT-0.1/
zip -r ../EVT-0.1-Gerbers.zip .
# Verify zip:
unzip -l ../EVT-0.1-Gerbers.zip
$ commit to git
git add hardware/gerbers/EVT-0.1/
git commit -m "fab: export EVT-0.1 Gerber package for EI Microcircuits"
git push
◆GTL — Top copper layer
◆G2L — Inner layer 2
◆G3L — Inner layer 3
◆G4L — Inner layer 4
◆G5L — Inner layer 5
◆G6L — Inner layer 6
◆GBL — Bottom copper layer (inner layers 7–8 if 8-layer)
◆GTS / GBS — Top and bottom solder mask
◆GTO / GBO — Top and bottom silkscreen
◆GML — Board outline (Mechanical 1)
◆DRL — Excellon drill file (plated and non-plated separate)
◆LDP — Drill pair definition (if blind/buried vias)
$ open in Gerber viewer
# In Altium: File → Import → Gerber
# Load all files from hardware/gerbers/EVT-0.1/
# Verify: all layers render, no missing copper, board outline closed
NOTE

Board outline must be a closed polygon on the Mechanical 1 (GML) layer. An open outline causes EI Microcircuits to reject the package. Use Edit → Select All → Tools → Convert → Outline Selected Objects to merge overlapping line segments.

NOTE

Ensure Gerber format is set to RS-274X (extended), not RS-274D. RS-274D omits aperture definitions and will not parse correctly at the fab.

Artifacts
▸
hardware/gerbers/EVT-0.1/
Full Gerber package — all copper, mask, silk, drill, and outline files.
▸
hardware/gerbers/EVT-0.1-Gerbers.zip
Zipped package for upload to EI Microcircuits portal.
Order Checklist
Complete19%
Open Items
1⚠️ BLOCKING FAB ORDER — Physical connectivity decision not made: Wi-Fi / Ethernet / BLE / cellular mix must be locked before assembly BOM can be finalized. EE recommendation: Ethernet + BLE 5.0. Resolve in schematic first, then re-export BOM and CPL.
2⚠️ BLOCKING FAB ORDER — Layer count (8-layer vs 10-layer HDI) must be confirmed before Gerbers are submitted. EVT tentatively 8-layer — document and resolve with EE lead.
3⚠️ BLOCKING CLOUD PROVISIONING — PCB serial numbers for all 36 devices (12 rooms × 3 zones: living_room/bathroom/entry) must be collected post-receipt and handed to cloud team before provision-batch can run for FAC-MOCAREV-001.
4OSD62x-PM lead time: 8–12 weeks from Octavo Systems. Initiate consignment immediately after connectivity decision — do not wait for PO to confirm sourcing.
5VIPPO: confirm EI Microcircuits supports via-in-pad plated-over for OSD62x-PM 500-ball BGA before submitting DFM package.
6X-ray inspection: confirm EI Microcircuits explicitly includes 100% X-ray on all OSD62x-PM BGAs pre-shipment. Verify it is a line item on the quote.